A semiconductor device such as an LSI includes various MOS (Metal oxide Semiconductor) transistors. Impurities for adjusting the threshold voltage are implanted into channels of these MOS transistors. However, the impurities are not homogeneously distributed in the channels. This causes a positional variation of the impurities. Such a variation is called RDF (Random Dopant Fluctuation).
In the generation having a long gate length, the RDF has a small influence on the threshold voltage. However, the threshold voltage becomes more sensitive to the RDF as the gate length becomes shorter. The threshold voltage easily varies due to the RDF.
In order to suppress the variation of the threshold voltage due to the RDF, it is effective to use as a channel a non-doped epitaxial silicon layer with the low impurity concentration.
Further, the MOS transistor which uses such a non-doped epitaxial silicon layer still has room for improvement in the performance. Note that, the technologies related to the present application are disclosed in Japanese Laid-open Patent Publications Nos. 2012-79743, 2002-9170, and S63-169059.